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PRELIMINARY
MoBL(R) UniClock CY22M1
Single Output, Low Power Programmable Clock Generator for Portable Applications
Features

Benefits
Small Footprint, 8-Pin QFN 1.7 x 1.7 x 0.6 mm3 Package Low Power and Low Jitter Operation Multiple Operating Voltages: CY22M1S: 2.5V, 3.0V, or 3.3V CY22M1L: 1.8V Programmable Single Output Clock Generator Frequency Range: 1 to 80 MHz Crystal or External Reference Clock Input Frequency Range: Fundamental Tuned Crystal: 8 to 48 MHz External Reference Clock: 1 to 80 MHz Programmable Capacitor Tuning Array Programmable PD# or OE Control Pin Programmable Asynchronous or Synchronous OE and PD# Modes Programmable Output Buffer Drive Strength
Services handsets, portable media players, personal navigation devices, digital cameras, digital camcorders, and other portable applications. Saves PCB space due to small form factor. Enables quick turnaround as well as flexibility and adaptability to design changes through programmability. Enables synthesis of highly accurate and stable output clock frequencies with zero or low PPM error. Enables fine tuning of output clock frequency by adjusting the crystal load CLoad using programmable internal capacitors. Lowers clock solution cost by pairing a high frequency PLL programmability with a low cost, low frequency crystal. Enables low power during the power down or output disable function. Provides flexibility for system applications through selectable asynchronous or synchronous output enable and disable.

Logic Block Diagram
Cypress Semiconductor Corporation Document Number: 001-49075 Rev. *C
*
198 Champion Court
*
San Jose, CA 95134-1709 * 408-943-2600 Revised August 20, 2009
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PRELIMINARY
MoBL(R) UniClock CY22M1
Pin Description
Figure 1. Package Pinout Drawing: CY22M1 8-Pin 1.7 x 1.7 mm2 QFN
VDD
8
NC 7
XOUT
1 CY22M1 8-Pin QFN
6
CLKOUT
XIN/CLKIN
2
5
NC
3 PD#/OE
4 GND
Table 1. Pin Definition: CY22M1 8-Pin 1.7 x 1.7 mm2 QFN Pin Number 1 2 3 4 5 6 7 8 Name XOUT XIN/CLKIN PD#/OE GND NC CLKOUT NC VDD Input Input Power - Output - Power IO Output Crystal or external clock input. Multifunction pin. Active low power down or active high output enable pin. Has weak internal pull up. Power supply ground. No connect. Pin has no internal connection. Programmable clock output. Output voltage depends on VDD. Has weak internal pull down. No connect. Pin has no internal connection. Programmable power supply: CY22M1S: 2.5V, 3.0V, 3.3V (standard voltage) CY22M1L: 1.8V (low voltage) Description Crystal output. Float for external clock input.
Document Number: 001-49075 Rev. *C
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PRELIMINARY
MoBL(R) UniClock CY22M1
Functional Description
The MoBL(R) UniClock CY22M1 is a programmable, high accuracy, PLL-based clock generator device designed for low power, space constrained applications. The low jitter and accurate outputs makes this device suitable for handsets, portable media players, personal navigation devices, digital cameras, digital camcorders, and other portable applications. The device has several programmable options listed in the section Programmable Features on page 4 of this data sheet. The entire configuration is one time programmable.
Power Management Feature
The MoBL(R) UniClock CY22M1 offers PD# (active LOW) and OE (active HIGH) functions. When the power down mode is selected (PD# =0), the oscillator and PLL are placed in a low supply current standby mode and the output is tristated and weakly pulled LOW. The oscillator and PLL circuits must relock when the part exits the power down mode. If the output is disabled (OE=0), the output is tristated and weakly pulled LOW. In this mode, the oscillator and PLL circuits continue to operate, which enables a rapid return to normal operation when the output is enabled.
In addition, the PD# or OE mode can be programmed to occur asynchronously or synchronously with respect to the output signal. When the asynchronous setting is used, entering power down or disabling the output occurs immediately (enabling logic delays) regardless of the position in the clock cycle. Similarly, exiting power down or enabling the output occurs immediately with no guarantee of full output clock pulses. However, when the synchronous setting is used, the part waits for a falling edge at the output before entering power down or disabling the output. This prevents output glitches. The first output pulse is guaranteed to be a full clock pulse when enabling outputs with a synchronous OE pin. The first output pulse is not guaranteed to be a full clock when exiting power down in synchronous or asynchronous mode.
Configurable PLL
The device uses a programmable PLL to generate output frequencies from 1 to 80 MHz. The high resolution of the PLL and flexible output dividers provide this flexibility.
Input Reference Clock Option
There is an option of a crystal or clock signal for the input reference clock. The frequency range for crystal (XIN) is 8 MHz to 48 MHz, while the range for an external reference clock (CLKIN) is 1 MHz to 80 MHz. A PLL bypass mode enables this device to be used as a crystal oscillator.
Multiple VDD Power Supply Option
The device has programmable power supply options. The operating supply voltages are 2.5V, 3.0V, or 3.3V for CY22M1S and 1.8V for CY22M1L.
Output Frequency Tuning
The MoBL(R) UniClock CY22M1 contains an on-chip oscillator with a built-in programmable capacitor array for fine tuning of the output frequency. The capacitive load seen by the crystal is adjusted by programming the memory bits. This feature can compensate for crystal variations or provide a more accurate synthesized frequency. Figure 2 on page 4 shows the crystal oscillator tuning circuit block diagram.
Programmable Output Drive Strength
The DC drive strength of the clock output can be programmed to one of two settings, enabling control of output rise and fall times. Table 2 shows the typical rise and fall times for both of the drive strength settings. Table 2. Output Drive Strength Output Drive Strength Low High Rise/Fall Time (ns) (Typical Value) 2.0 1.0
Document Number: 001-49075 Rev. *C
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PRELIMINARY
MoBL(R) UniClock CY22M1
Crystal Oscillator Tuning Circuit
Table 3. Crystal Oscillator Tuning Capacitor Values Cap C7 C6 C5 C4 C3 C2 C1 C0 Value[1] 5.000 2.500 1.250 0.625 0.313 0.156 0.078 0.039 Unit pF pF pF pF pF pF pF pF
Figure 2. Crystal Oscillator Tuning Block Diagram
FXIN, ESR, C0
RF
-R CPXIN CXIN C0 C1 C2 C3 C4 C5 C6 C7 C7 C6 C5 C4 C3 C2 C1 C0 CXOUT CPXOUT
X0
X1
X2
X3
X4
X5
X6
X7
X7
X6
X5
X4
X3
X2
X1
X0
Programmable Features
The following list of features can be custom configured:

Programming Support
The device is available in factory and field programmable versions. The CyClockMaker Programming kit along with CyClockDesigner configuration software is used for field programming the device. For specific programming needs, contact your local Cypress field application engineer (FAE) or sales representative.
PLL frequency and output divider value Oscillator tuning (crystal load) capacitance value Direct oscillator output (PLL bypass) High or low power supply voltage operation Power management mode (OE or PD#) Power management timing (synchronous or asynchronous) Programmable output drive strength
Note 1. The capacitor values are nominal.
Document Number: 001-49075 Rev. *C
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PRELIMINARY
MoBL(R) UniClock CY22M1
Absolute Maximum Ratings
Parameter[2] VDD VIN TS TJ ESDHBM DRET PRCYCLE UL-94 MSL Description Supply voltage, 2.5V/3.0V/3.3V range Supply voltage, 1.8V range Input voltage Temperature, storage Temperature, junction ESD protection (human body model) Data retention at TJ = 125C Maximum programming cycle Flammability rating Moisture sensitivity level Relative to VSS Non functional Non functional JEDEC EIA/JESD22-A114-E Condition Min -0.5 -0.5 -0.5 -55 -40 2000 10 1 V-0 at 1/8 in. 3 Max 4.4 2.8 VDD+0.5 +125 +125
- -
Unit V V V C C Volts Yr.
Recommended Operating Conditions
Parameter[2] VDD Description Supply voltage, 1.8V operating range for CY22M1L Supply voltage, 2.5V operating range for CY22M1S Supply voltage, 3.0V operating range for CY22M1S Supply voltage, 3.3V operating range for CY22M1S
TAC TAI TPU TPD
Min 1.6 2.2 2.7 3.0
0 -40 0.05 100
Typ
- - - - - - - - -
Max 2.0 2.8 3.3 3.6
70 85 500 -
Unit V V V V
C C ms ns pF
Commercial ambient temperature Industrial ambient temperature Power up time for VDD to reach minimum specified voltage (power ramp must be monotonic) Minimum pulse width of PD#/OE input Output load capacitance
COUT
-
15
Note 2. Stresses beyond those listed underAbsolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to Absolute-Maximum-Rated Conditions for extended periods may affect device reliability or cause permanent device damage.
Document Number: 001-49075 Rev. *C
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PRELIMINARY
MoBL(R) UniClock CY22M1
DC Electrical Specifications
Parameter[3] Description VIL1 VIH1 VIL2 VIH2 VOL1 VOH1 VOL2 VOH2 IIL IIH IOZL IOZH IDD Input low voltage of PD#/OE Input high voltage of PD#/OE Input low voltage of REFIN Input high voltage of REFIN Output low voltage Output high voltage Output low voltage Output high voltage Input low current Input high current Output leakage current Output leakage current Power supply current for CY22M1L CY22M1S CY22M1L CY22M1S CY22M1L IOL = 8 mA, VDD = 3.0/3.3V IOH = 8 mA, VDD = 3.0/3.3V IOL = 4 mA, VDD = 1.8/2.5V IOH = 4 mA, VDD = 1.8/2.5V Input = VSS Input = VDD Output = VSS, Tj = 85C Output = VDD FOUT = 12 MHz, no load FOUT = 12 MHz, 15 pF load FOUT = 48 MHz, no load FOUT = 48 MHz, 15 pF load FOUT = 12 MHz, no load FOUT = 12 MHz, 15 pF load FOUT = 48 MHz, no load FOUT = 48 MHz, 15 pF load Tj = 85C PD#/OE = low PD#/OE = high Test Conditions Min - 0.8*VDD -0.2 -0.2 1.2 1.2 - VDD-0.4 - 0.9*VDD - - - - - - - - - - - - - 1 100 500 - Typ - - - - - - - - - - <1 <1 <1 - 1.0 1.2 1.6 2.8 1.5 3.3 2.5 6.5 25 - - - - Max 0.2*VDD - 0.4 0.4 2.1 VDD+0.3 0.4 - 0.1*VDD - 10 10 5 50 - - - - - - - - 50 6 250 1500 7
[4]
Unit V V V V V V V V V V A A A A mA mA mA mA mA mA mA mA A M k k pF
Power supply current for CY22M1S
IPD RUP RDN CIN
Power down current Input pull up resistors Output pull down resistors Input capacitance of PD#/OE pin
Notes 3. Parameters are guaranteed by design and characterization. Not 100% tested in production. 4. VIH2 absolute maximum value is 2.1V. For VDD = 1.6V to 1.8V, the maximum VIH2 is VDD + 0.3V.
Document Number: 001-49075 Rev. *C
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PRELIMINARY
MoBL(R) UniClock CY22M1
AC Electrical Specifications
Parameter[6] FIN (Crystal) FIN (Clock) FCLK TR TF DC TCCJ TP TPO,CLK TPU,CLK TPD,ASYNC TPD,SYNC TOD,ASYNC TOD,SYNC TOE,ASYNC Description Crystal frequency range (XIN) Clock frequency range (REFIN) Output frequency Output rise time Measured from 20% to 80% VDD, COUT = 15 pF, drive strength set to high Measured from 80% to 20% VDD, COUT = 15 pF, drive strength set to high Using PLL as a source Test Conditions Min 8 1 1 - Typ - - - - Max 48 80 80 1.5 Unit MHz MHz MHz ns
Output fall time
-
-
1.5
ns
Output clock duty cycle
45 - - - - - - - - - - -
50 150 - 150 - - - - - - - -
55 200 1 200 1 5 5 100 1.5T + 100 100 1.5T + 100 100
% %TOUT[5] ps %TOUT[5] ms ms ns ns ns ns ns ps
Cycle-to-cycle jitter of CLKOUT using 80 MHz > FOUT > 50 MHz PLL FOUT < 50 MHz Period jitter of CLKOUT using PLL Power on time for output clock Power up time from power down for output clock Time from falling edge of PD# to stopped outputs, asynchronous mode Time from falling edge of PD# to stopped outputs, synchronous mode Time from falling edge of OE to stopped outputs, asynchronous mode Time from falling edge of OE to stopped outputs, synchronous mode Time from rising edge of OE to running outputs, asynchronous mode 80 MHz > FOUT > 50 MHz FOUT < 50 MHz
Notes 5. %TOUT is the percentage of the output clock period. 6. Parameters are guaranteed by design and characterization. Not 100% tested in production.
Document Number: 001-49075 Rev. *C
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PRELIMINARY
MoBL(R) UniClock CY22M1
Recommended Crystal Specifications for SMD Package
Parameter FMIN FMAX R1 C0 CL DL Minimum frequency Maximum frequency Maximum motional resistance (ESR) Nominal shunt capacitance Nominal load capacitance Maximum crystal drive level Description Range 1 Range 2 Range 3 8 14 135 4 18 300 14 28 50 4 14 300 28 48 30 2 12 300 Unit MHz MHz pF pF W
Switching Waveforms
Figure 3. CLKOUT Rise and Fall Time
80% CLKOUT 20% T R T F VDD
0V
Figure 4. Duty Cycle Timing (DC)
T1B T1A VDD/2 CLKOUT DC =T1A/T1B
Figure 5. Period Jitter
VDD VDD/2 CLKOUT J
P
0V
CLKOUT -3 +1 +3
Figure 6. Cycle to Cycle Jitter
T CCJ = Max(T2-T1, T3-T2, T4-T3, ..., T1000-T999) T1 CLKOUT T2 T3 T4 T5 T998 T999 T1000 VDD 0V
Document Number: 001-49075 Rev. *C
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PRELIMINARY
MoBL(R) UniClock CY22M1
Figure 7. Power On Timing
VDD VDD TRAMP TPO,OUT Clock Startup VDD 0V 0V
CLKOUT
Figure 8. Power Down Timing (Synchronous and Asynchronous Modes) and Power Up Timing
PD# VDD 0V 1/f Internal Clock CLKOUT (SYNC) CLKOUT (ASYNC) TPD,ASYNC Weakly Pulled Low Clock Startup TPD,SYNC TPU,OUT Clock Weakly Pulled Low Startup TPU,OUT Clock Startup VDD 0V VDD 0V VDD 0V
Figure 9. CLKOUT Enable (Synchronous and Asynchronous Modes) and CLKOUT DisableTiming
VDD 0V VDD 0V VDD 0V VDD 0V
OE Internal Clock CLKOUT (SYNC) CLKOUT (ASYNC)
TOD,SYNC
TOE,SYNC Weakly Pulled Low
TOD,ASYNC TOE,ASYNC Weakly Pulled Low
Document Number: 001-49075 Rev. *C
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PRELIMINARY
MoBL(R) UniClock CY22M1
Ordering Information
Part Number[7],[8] Pb-free CY22M1SCALGXC-00 8-pin QFN, Field Programmable Supply voltage: 2.5V, 3.0V, or 3.3V Commercial, 0C to 70C Supply voltage: 2.5V, 3.0V, or 3.3V Commercial, 0C to 70C Supply voltage: 1.8V Supply voltage: 1.8V Commercial, 0C to 70C Commercial, 0C to 70C CY22M1SCALGXC-00T 8-pin QFN, Field Programmable tape and reel CY22M1LCALGXC-00 8-pin QFN, Field Programmable CY22M1LCALGXC-00T 8-pin QFN, Field Programmable tape and reel CY22M1SCALGXI-00 8-pin QFN, Field Programmable CY22M1SCALGXI-00T 8-pin QFN, Field Programmable tape and reel CY22M1LCALGXI-00 CY22M1LCALGXI-00T CY22M1SCXLGXC-YY CY22M1LCxLGXC-yy CY22M1SCxLGXI-yy CY22M1SCxLGXI-yyT CY22M1LCxLGXI-yy CY22M1LCxLGXI-yyT 8-pin QFN, Field Programmable 8-pin QFN, Field Programmable tape and reel 8-pin QFN 8-pin QFN 8-pin QFN 8-pin QFN - tape and reel 8-pin QFN 8-pin QFN - tape and reel Type VDD(V) Production Flow
Supply voltage: 2.5V, 3.0V, or 3.3V Industrial, -40C to +85C Supply voltage: 2.5V, 3.0V, or 3.3V Industrial, -40C to +85C Supply voltage: 1.8V Supply voltage: 1.8V Industrial, -40C to +85C Industrial, -40C to +85C
Supply voltage: 2.5V, 3.0V, or 3.3V Commercial, 0C to 70C Supply voltage: 2.5V, 3.0V, or 3.3V Commercial, 0C to 70C Supply voltage: 1.8V Supply voltage: 1.8V Commercial, 0C to 70C Commercial, 0C to 70C
CY22M1SCXLGXC-YYT 8-pin QFN - tape and reel CY22M1LCxLGXC-yyT 8-pin QFN - tape and reel
Supply voltage: 2.5V, 3.0V, or 3.3V Industrial, -40C to +85C Supply voltage: 2.5V, 3.0V, or 3.3V Industrial, -40C to +85C Supply voltage: 1.8V Supply voltage: 1.8V Industrial, -40C to +85C Industrial, -40C to +85C
Figure 10. Actual Marking
Pin 1 indicator
MMM NNN
(MMM) = 7th, 8th and 9th characters of marketing part number (NNN) = Last 3 digits of assembly lot number
Notes 7. x indicates a part marking placeholder to distinguish different configurations for the same customer, beginning alphabetically from "A". 8. yy indicates "Factory Programmable" and are factory programmed configurations. For more details, contact your local Cypress FAE or Cypress Sales Representative.
Document Number: 001-49075 Rev. *C
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PRELIMINARY
MoBL(R) UniClock CY22M1
Package Drawing and Dimensions
Figure 11. Package Outline Drawing: CY22M1 8-Pin 1.7 x 1.7 x 0.6 mm3 QFN
001-49591 **
Document Number: 001-49075 Rev. *C
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PRELIMINARY
Document History Page
MoBL(R) UniClock CY22M1
Document Title: MoBL(R) UniClock CY22M1 Single Output, Low Power Programmable Clock Generator for Portable Applications Document Number: 001-49075 Rev ** *A ECN 2571065 2636981 Orig. of Change DPF/CXQ/AESA CXQ/PYRS Submission Date 09/23/08 01/15/09 New Data Sheet Changed max output frequency to 80 MHz Changed min input reference frequency to 1 MHz Changed max input reference frequency to 80 MHz Changed Idd max conditions and specs Updated VIH/VIL specs for REFIN Added typical IPD value of 25uA Added period jitter spec Removed maximum frequency from Output Drive Strength table Updated part numbers in Ordering Information Replaced CyberClocksOnline and CY3672 programmer kit reference with CyClockMaker and CyClockDesigner reference Added marking format information Updated package drawing to spec 001-49591 Changed from Advanced to Preliminary datasheet Deleted "1.8V" when referring to external reference Updated VIH2 maximum for CY22M1L and added note 4 Added IDD values to DC Electrical Specifications table Description of Change
*B
2673516
CXQ/PYRS
03/13/09
*C
2756169
TSAI
08/20/2009 Post to external web
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer's representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.
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(c) Cypress Semiconductor Corporation, 2008-2009. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress' product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement.
Document Number: 001-49075 Rev. *C
Revised August 20, 2009
Page 12 of 12
MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor. All product and company names mentioned in this document are the trademarks of their respective holders.
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